Wavetable audio is a widely used and well known technique in the audio processing art for generating or recreating audio sounds. In the past, an audio processing component such as, for example, an audio card would have dedicated read only memory (ROM) associated therewith. Audio samples referred to as "wavetable samples" would be stored in the dedicated ROM. In order to recreate a particular sound (typically referred to as a "voice"), the audio card fetched the desired wavetable samples from the dedicated ROM, processed the sample, and created the desired voice. Commonly, numerous samples have to be fetched and processed in order to create a desired voice. Although dedicated ROM facilitates the rapid acquisition of numerous wavetable samples, permanently dedicating a specific portion of memory to a particular application is not always a cost effective or desired implementation.
Some prior art approaches to wavetable audio now store the avetable samples in system memory, for example, dynamic random access memory (DRAM). By storing the wavetable samples in system DRAM, the need to have a permanently dedicated memory space allocated for audio processing purposes is eliminated. That is, a particular memory space can be allocated storing wavetable samples at one time, and can then be used for another purpose at a different time. Also, by storing the wavetable samples in system memory, more space is available to store the samples. The use of system memory for storing wavetable samples is not without complications, however. In order to access wavetable samples stored in system memory, the digital signal processor of the audio card must access a PCI bus.
As shown in Prior Art FIG. 1A, when dedicated ROM is used to store the wavetable samples, the DSP 10 directly accesses the dedicated ROM 12. On the other hand, as shown in Prior Art FIG. 1B, DSP 10 must first access a PCI bus 14 before accessing wavetable samples stored in system memory 16. Thus, in such an instance, the DSP must request access to the PCI bus, receive a grant to the PCI bus, and traverse the PCI bus in order to fetch a wavetable sample from system memory. Such required actions prolong the sample fetching time, thus increasing audio processing latency. As a result, the quality of generated audio voices can suffer.
Additionally, wavetable samples stored in system memory are typically stored in a discontiguous manner. That is, in dedicated ROM applications, for example, an entire megabyte of wavetable samples is stored in a single contiguous block of memory space. In system memory applications, however, wavetable samples are typically stored in numerous discontiguous blocks of memory space. The numerous discontiguous blocks of memory space are referred to as "sample pages". With reference now to Prior Art FIG. 1C, a schematic diagram showing numerous wavetable sample pages, typically shown as 18, is given. By storing the numerous wavetable sample pages in separate discontiguous blocks of memory space, the sample pages can be stored in various locations within the system memory. In so doing, the need to allocate or reserve a single large contiguous block of system memory solely for wavetable samples is eliminated. Hence, effective use of the system memory is achieved.
Although, storing wavetable samples in various discontiguous locations permits effective use of system memory, such an approach necessitates an intricate addressing scheme. Referring now to Prior Art FIG. 2, a schematic diagram of a conventional architecture employed to fetch wavetable samples from system memory is shown. In the prior art architecture of Prior Art FIG. 2, a DSP 10, of Prior Art FIGS. 1A-1C, generates an address 200 corresponding to a respective wavetable sample. A sample page address table (SPAT) base address register 202 is disposed to receive part of address 200. An adder 204 then combines a SPAT base address with the received part of address 200. The combined address points to a particular location in a SPAT 206 residing in system memory. SPAT 206, in turn provides a sample page base address. The sample page base address points to the base of a particular wavetable sample page, typically shown as 208, residing in system memory. Thus, DSP 10 must access a PCI bus 14, of Prior Art FIGS. 1B and 1C, in order to fetch the base address of a given sample page. Hence, prior art schemes require "one trip" across PCI bus 14 simply to fetch the base address of a sample page.
Referring still to Prior Art FIG. 2, after the sample page base address has been fetched, another adder 210 combines the sample page base address with a sample page offset address. The sample page offset address comprises another portion of address 200 generated by DSP 10 of Prior Art FIGS. 1A-1C. The combined sample page base address and sample page offset address point to a particular entry in one of the wavetable sample pages, typically shown as 208. Thus, DSP 10 is then able to fetch a particular entry from the collection of wavetable sample pages 208. As mentioned above, wavetable sample pages 208 reside in system memory. Thus, after generating the complete wavetable sample page entry address, DSP 10 must make yet another trip across PCI bus 14 of Prior Art FIGS. 1B and 1C in order to fetch a respective wavetable sample page entry. Therefore, prior art sample fetching schemes require a first trip across a PCI bus to fetch a sample page base address, and then a second trip across the PCI bus to fetch a desired wavetable sample page entry. Hence, prior art sample fetching methods require at least two trips across a PCI bus. As mentioned above, each of the trips across the PCI bus requires the DSP to request access to the PCI bus, receive a grant to the PCI bus, and then traverse the PCI bus. Furthermore, if the grant to the PCI bus is lost, interrupted, or otherwise deasserted before the DSP has successfully fetched either the sample page base address or the wavetable sample page entry, the DSP must again regain access to the PCI bus. As a result, it is possible in prior art sample fetching schemes, that more than two trips across the PCI bus will be required to fetch a single wavetable sample page entry.
Additionally, it will be understood by those of ordinary skill in the art that a DSP will typically desire to consecutively fetch several wavetable sample page entries. As a result, the sample fetching latency incurred by repeatedly accessing the PCI bus can become a performance limiting factor.
Thus, a need exists for an apparatus and method which expedites sample fetching from system memory. A further need exists for an apparatus and method which decreases the need to access a PCI bus when fetching samples from system memory.